CDB4245【PDF 36/59 页】BOARD EVAL FOR CS4245 CODEC

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CS4245

De-emphasis is only available in Single-Speed Mode.

Gain

dB

T1=50 μs

0dB

T2 = 15 μs

-10dB

F1

3.183 kHz

F2

10.61 kHz

Frequency

Figure 15. De-Emphasis Curve

4.10

4.11

36

Internal Digital Loopback

The CS4245 supports an internal digital loopback mode in which the output of the ADC is routed to the input

of the DAC. This mode may be activated by setting the LOOP bit in the Signal Selection register (See Sec-

tion 6.6 “Signal Selection - Address 06h” on page 46 ). To use this mode, the ADC and DAC must be oper-

ating at the same synchronous sample rate.

When this bit is set, the status of the DAC_DIF[1:0] bits in register 03h will be disregarded by the CS4245.

Any changes made to the DAC_DIF[1:0] bits while the LOOP bit is set will have no impact on operation until

the LOOP bit is cleared, at which time the Digital Interface Format of the DAC will operate according to the

format selected by the DAC_DIF[1:0] bits. While the LOOP bit is set, data will be present on the SDOUT pin

in the format selected by the ADC_DIF bit in register 04h.

Mute Control

The MUTEC pin becomes active during power-up initialization, reset, and muting if the MCLK2 to LRCK2

ratio is incorrect in Asynchronous Mode or the MCLK1 to LRCK2 ratio is incorrect in Synchronous Mode,

and during power-down. The MUTEC pin is intended to be used as control for an external mute circuit in

order to add off-chip mute capability.

Use of the M ute Control function is not ma ndatory, but recommended, for designs requiring the absolute

minimum in extraneous clicks and pops. Also, use of the Mute Control function can enable the system de-

DS656F3

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